[IEEE] Design of SPDT switching circuit with asymmetric structure based on 0.25um GaN HEMT process |
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2080
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Ultra-Low Power SAR ADC Using Statistical Characteristics of Low-Activity Signals
30
Performance Modeling and Comparisons of an FPGA-based Direct Simulation Monte Carlo Solver
30
PQ Improvement of Four Wire Distribution Grid Based Dual Stage Solar PV Array Integrated UPQC
30
Resource-Efficient Hybrid Machine Learning Model for IoT SMS Spam Detection
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A 8 Channels 14 bits 100 MHz Sample and Hold Circuit Based on Delay-Locked Loop Control