[Other] Energy-efficient redundant transition-free TSPC dual-edge flip-flop design with single-transistor clocked buffer

blue_cheese Post time 1 hour(s) ago | Show all posts |Read mode
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journalㄩAIP Conference Proceedings

AuthorsㄩTagore Rishil Charugundla; G. Chaitanya Reddy

Published dateㄩ2026--

DOIㄩ10.1063/5.0341946

PDF linkㄩhttps://pubs.aip.org/aip/acp/article-lookup/doi/10.1063/5.0341946

Article linkㄩhttps://doi.org/10.1063/5.0341946

Article SourceㄩAIP Publishing


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