A 1.8–65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators

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journal：IEEE Journal of Solid-State Circuits

Authors：Martijn Timmermans; Kyle van Oosterhout; Marco Fattori; Pieter Harpe; Yao-Hong Liu; Eugenio Cantatore

Published date：2024-4-

DOI：10.1109/jssc.2024.3352735

PDF link：https://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=10433522

Article link：https://doi.org/10.1109/jssc.2024.3352735

Article Source：Institute of Electrical and Electronics Engineers (IEEE)。

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[IEEE] A 1.8–65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators

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