[IEEE] Efficient 3-D Convolutional Neural Network Model and VLSI Architecture for Low-Latency and Low-Complexity Processing

ADDITION Post time 3 day(s) ago | Show all posts |Read mode
This post will be closed automatically in 2026-08-01 13:23
Reward30points

journalㄩIEEE Transactions on Very Large Scale Integration (VLSI) Systems

AuthorsㄩYung-Yi Gu; Liang-Yu Li; Chung-An Shen

Published dateㄩ2026-5-

DOIㄩ10.1109/tvlsi.2026.3667699

PDF linkㄩhttps://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=11421076

Article linkㄩhttps://doi.org/10.1109/tvlsi.2026.3667699

Article SourceㄩInstitute of Electrical and Electronics Engineers (IEEE)


Remarkㄩ

Best Answer

Please approve

View Full Content

Reply

Use magic Donate Report

All Reply1 Show all posts
Rameha1980 Post time 3 day(s) ago | Show all posts

This post has been completed

Completed attachments will be deleted within 24 hours.
Reply

Use magic Donate Report

Return to the list