[Elsevier] Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473K down to 173K for analog applications

ShrutiKuriya Post time 1 hour(s) ago | Show all posts |Read mode
This post will be closed automatically in 2026-09-08 14:34
Reward10points

journalㄩSolid-State Electronics

AuthorsㄩV.C.P. Silva; J.A. Martino; E. Simoen; A. Veloso; P.G.D. Agopian

Published dateㄩ2023-10-

DOIㄩ10.1016/j.sse.2023.108729

PDF linkㄩhttps://www.sciencedirect.com/sc ... 038110123001429/pdf

Article linkㄩhttps://doi.org/10.1016/j.sse.2023.108729

Article SourceㄩElsevier BV


Remarkㄩ
Reply

Use magic Donate Report

All Reply0 Show all posts

Reply

You have to log in before you can reply Login | Register

Points Rules

Junior Member
  • post

  • reply

  • points

    20


Return to the list