[IEEE] URAM-Based Asynchronous FIFO Design for Improved Throughput and FPGA RAM Usage

nihal2121 Post time The day before yesterday 19:32 | Show all posts |Read mode
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journalㄩ2025 35th International Conference on Field-Programmable Logic and Applications (FPL)

AuthorsㄩMartim Rosado; Pedro Tom芍s; Nuno Roma; Andr谷 David

Published dateㄩ2025-9-1

DOIㄩ10.1109/fpl68686.2025.00021

PDF linkㄩhttps://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=11449064

Article linkㄩhttps://doi.org/10.1109/fpl68686.2025.00021

Article SourceㄩIEEE﹝


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