Comprehensive search ChatGPT Online Scientific research tools Facebook Group Tools Telegram
Sign in Sign Up

Science Hub 每 Free Research Papers | Academic Community


[IEEE] An Energy-Efficient 16-Bit Edge AI Architecture Featuring a Systolic Array with Adaptive Vedic Multipliers

sravya-garre Post time 2026-10-16 14:52:58 | Show all posts |Read mode
This post will be closed automatically in 2026-10-19 14:52
Reward30points

×

Create a Similar Post

journalㄩ2026 International Conference on Signal Analysis for Smart Systems (SIGNASS)

AuthorsㄩSubhadip Ghanta; Tanushree Ganguly; Sanket Shaw; Adwitiyo Bera; Didipsha Guha; Chandi Pani

Published dateㄩ2026-2-12

DOIㄩ10.1109/signass67826.2026.11480007

PDF linkㄩhttps://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=11480007

Article linkㄩhttps://doi.org/10.1109/signass67826.2026.11480007

Article SourceㄩIEEE﹝


Remarkㄩ

Best Answer

Georgee Junior Member
2026-10-16
Please approve

View Full Content

You can support us by donating, we would be very grateful.
Reply

Use magic Donate Report

All Reply1 Show all posts
Georgee Post time 2026-10-16 14:52:59 | Show all posts

This post has been completed

Completed attachments will be deleted within 24 hours.
You can support us by donating, we would be very grateful.
Reply

Use magic Donate Report

sravya-garre Lv.2
Junior Member

  • post

  • reply

  • points

    290

Same Category


Latest Reply

Announcement

Daily Top Contributors

Return to the list