FPGA based design and verification of area efficient cryptographic processor

Post time 2026-10-16 15:01:48

journal：2026 6th International Conference on Emerging VLSI and Semiconductor Technology for AI and Computing Applications (EVST)

Authors：K.R Deekshitha; Aliyah Sharief; R Nandashree; Sadiya Khanum; Bitan De

Published date：2026-6-

DOI：10.1109/evst69093.2026.11660647

PDF link：https://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=11660647

Article link：https://doi.org/10.1109/evst69093.2026.11660647

Article Source：IEEE。

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Post time 2026-10-16 15:01:49

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