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[IEEE] Impact of Voltage Class on SiC MOSFET Paralleled Chip Temperature Imbalance

usuk Post time 2026-10-18 11:44:37 | Show all posts |Read mode
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journalㄩ2025 IEEE International Workshop on Integrated Power Packaging (IWIPP)

AuthorsㄩRowan Aldridge; Nick Baker

Published dateㄩ2025-4-8

DOIㄩ10.1109/iwipp61784.2025.10971466

PDF linkㄩhttps://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=10971466

Article linkㄩhttps://doi.org/10.1109/iwipp61784.2025.10971466

Article SourceㄩIEEE﹝


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