A Low-Power PLL with Supply Noise Insensitive VCO in 65nm CMOS

Post time 2026-10-18 23:36:31

journal：2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

Authors：Thinh Tran-Dinh; Minh Nguyen-Quang; Hung Le-Quang; Du Doan-Khanh; Huy Do-Quang; Sang-Gug Lee; Loan Pham-Nguyen

Published date：2025-10-12

DOI：10.1109/apccas67402.2025.11376841

PDF link：https://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=11376841

Article link：https://doi.org/10.1109/apccas67402.2025.11376841

Article Source：IEEE。

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Post time 2026-10-18 23:36:32

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