[IEEE] Analog Blocks for 8-Bit SAR ADC: Rail-to-Rail Comparator and Two-Stage Operational Amplifier Designed with Open-Source Tools and Sky130 PDK

sampleandhold Post time 2026-10-17 18:22:46 | Show all posts |Read mode
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journalㄩ2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

AuthorsㄩUriel Jaramillo-Toral; Susana Ortega-Cisneros; Emilio Isaac Baungarten-Leon; Erick Jaramillo-Toral; H谷ctor Emmanuel Muoz Zapata

Published dateㄩ2025-10-12

DOIㄩ10.1109/apccas67402.2025.11378356

PDF linkㄩhttps://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=11378356

Article linkㄩhttps://doi.org/10.1109/apccas67402.2025.11378356

Article SourceㄩIEEE﹝


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